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kicad autonomous pcb pro
Autonomous end-to-end PCB layout, routing, and DRC validation for KiCad 8/9/10 via MCP.
$39
kicad autonomous pcb pro
Example session with this skill installed
Route a 2-layer PCB for my ESP32-S3 sensor node. Place the USB-C port on the left edge, ensure all decoupling caps are within 2.5mm of the IC, and export the Gerbers once DRC is clean.
- Read your context and instructions
- Compiled the kicad autonomous pcb
I have completed the PCB layout for the ESP32-S3 sensor node. The design features a 2-layer stackup with a solid GND plane on the bottom copper (B.Cu). All components are placed, signal traces are routed with 45-degree bends, and the DRC check returned zero errors.
Layout Summary & DRC Report
| Category | Status | Details |
|---|---|---|
| Dimensions | Pass | 50.0mm x 35.0mm |
| Connectivity | 100% | 0 Unrouted Airwires |
| DRC Errors | 0 | Verified via run_drc_check |
| Trace Width | 0.25mm | Signal (8-10 mil) |
| Power Traces | 0.80mm | 3V3 / VBUS Rails |
| Decoupling | Pass | All caps < 2.0mm from VCC pins |
Production Files Generated
# Manufacturing files exported to /production_gerbers/
- ESP32_Sensor_Node-F_Cu.gbr # Front Copper
- ESP32_Sensor_Node-B_Cu.gbr # Back Copper (GND Plane)
- ESP32_Sensor_Node-F_Mask.gbr # Solder Mask
- ESP32_Sensor_Node-F_Silkscreen.gbr # Silkscreen
- ESP32_Sensor_Node-Edge_Cuts.gbr # Board Outline
- ESP32_Sensor_Node.drl # Excellon Drill File
- ESP32_Sensor_Node-top-render.svg # Visual Audit Render
Next steps
- Review the
ESP32_Sensor_Node-top-render.svgto verify silkscreen labels. - Zip the contents of the
production_gerbers/folder. - Upload the zip to your preferred fab house (JLCPCB/PCBWay).
Connects securely to your tools. The creator never sees your data.
About this skill
Manual PCB layout is a bottleneck that delays hardware prototypes. This skill transforms schematic intents and mechanical constraints into manufacture-ready KiCad boards by orchestrating the KiCad Model Context Protocol (MCP) server for autonomous routing, placement, and validation.
What it does
- Autonomous Layout places footprints and routes traces using 45-degree mitered geometry and DFM-aware clearances.
- Closed-Loop DRC Validation runs real-time design rule checks and iteratively fixes clearance or connectivity errors until zero violations remain.
- Visual SVG Inspection generates board renders to audit copper balance, silkscreen legibility, and courtyard collisions.
- Power & Signal Integrity enforces decoupling capacitor proximity and manages differential pair routing for USB and high-speed lines.
- Production Export generates RS-274X Gerbers, Excellon drill files, and pick-and-place centroids for immediate fabrication.
How it works
- System Pre-Flight: The skill runs
get_system_statusto verify the KiCad environment and initializes the project stackup (2-layer or 4-layer). - Mechanical Anchoring: It places fixed components like mounting holes and USB-C connectors based on enclosure constraints.
- Iterative Routing: It executes trace routing for power rails and signals, placing vias and ground planes according to IPC-2221 standards.
- Validation Loop: It triggers
run_drc_checkandrender_board_preview, resolving any airwires or clearance overlaps automatically.
Frameworks & tools
Built for KiCad 8, 9, and 10. It integrates with kicad-mcp-bridge and kicad-cli, supporting local or network-connected workstations via Claude Code, Cursor, or Copilot.
Why this beats prompting it yourself
Standard LLMs cannot "see" or interact with a PCB database, leading to hallucinated coordinates and invalid geometry. This skill uses direct MCP tool calls to ensure every trace and via exists in the actual .kicad_pcb file with mathematically verified connectivity.
Use cases
- Rapid Prototyping of ESP32 or STM32 breakout boards from a netlist.
- Automated Refactoring of existing layouts to meet tighter fab house design rules.
- High-Speed Routing for USB 2.0 or RF circuits requiring specific impedance and length matching.
- BOM & Gerber Generation for one-click handoff to JLCPCB, PCBWay, or OSH Park.
Known limitations
Requires an active KiCad MCP server runtime. High-density BGA breakout or complex multi-gigahertz RF designs may require manual oversight of specific stackup impedance profiles.
Find more skills like this on the Claude Skills Marketplace, the Codex Skills Marketplace and the Gemini Skills Marketplace, or browse Claude Skills for APIs & Backend.
Requires active kicad-mcp-bridge or compatible runtime. High-density BGA or multi-GHz RF designs may require manual impedance profile verification.
How to use
- 1
Connect your agent to the Agensi MCP
Copy the prompt and paste it into Claude, ChatGPT, Cursor or any agent that supports MCP. It sets up the connection for you. Manual setup
- 2
Sign in to Agensi
Your agent shows a sign-in link. Sign in and click Allow.
- 3
Ask for what you need
Your agent loads this skill and uses it on your task. It always asks before buying a skill.
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